Massachusetts Institute of Technology
Department of Electrical Engineering and Computer Science

6.111 - Introductory Digital Systems Laboratory

SCHEDULE FALL 2003

This outline is dynamic. The only things about it that are unlikely to change much is that which has already happened, quiz dates, and due dates, which are firm. The latest revision is on the 6.111 web-page.

All lectures (not the quiz) have lecture notes in addition to the handouts listed below.

Lecture	Date	Day	Handouts	Due	Lecture Topic
L1	Sept. 3	W	First Day Packet includes:	6.111 Sign-up	Overview,
			General Information	Sheet	Intro to VHDL
			Syllabus
			Due Dates
			General Lab Information
			Computer Information
			Intro to HP Logic Anal.
			Beginner's Guide to WARP
			PAL Programming
			Problem Set 1
			Lab 1
			Safety Memo
			Kit Signout Form
			Background Information
			and Schedule Form
L2	Sept. 5	F	Gates, Symbols, and Busses		Symbols, Kmaps,
					TTL Innards, Delay
					Boolean Algebra
L3	Sept. 8	M			VHDL for Comb. Logic
					VHDL entities
					VHDL architectures
					Structural Ckt. Diag.
					Computer Demo
					VHDL simulation
L4	Sept. 10	W	PS 2, PS 1 Solutions	PS 1	Clocking Primitives
					How to build FF
					Latches, Edge Trig. FF
					D, T, SR, JK flip-flops
					MUXes, Counters,
					Shift Reg.

Lecture	Date	Day	Handouts	Due	Lecture Topic
L5	Sept. 12	F			VHDL Statements
					VHDL processes
					Generic and Others
					VHDL counters
					Counter simulation
					Computer Demo
L6	Sept. 15	M			Pulse Synchronization
					FSM Notation
					FSM Example
					FSMs in VHDL
No Lecture	Sept. 17	W	PS 3 avail.	PS 2 due BUT
			in lab and on web	turn it in Fri.
L7	Sept. 19	F	Report Guide,	Turn in PS 2	Memories
			PS 2 solns	Lab 1 due	CI-M Writing
				in lab by 5:00 p.m.
No Lecture	Sept. 22	M			Student Holiday
L8	Sept. 24	W	Lab 2		Lab 2 Discussion,
			6264 data sheets		Lab 2 Demo (TV Camera)
					glitches,
					VHDL identifiers,
					attributes, and tristate
L9	Sept. 26	F	PS 4,	PS 3	Grid Example
			PS 3 Solutions		Hierarchical design
No Lecture	Sept. 29	M		Lab 2 Design
				Conference
L10	Oct. 1	W			Adders, ALUs,
					and binary arithmetic
No Lecture	Oct. 3	F		Add Date
No Lecture	Oct. 6	M		Lab 2 check-off due
				in lab by 5:00 p.m.
	Oct. 7	T		Lab 2 report due
				in lab by 5:00 p.m.
L11	Oct. 8	W	Lab 3, PS 5,	PS 4	Lab 3 discussion,
			PS 4 Solutions		demo (TV Camera)
L12	Oct. 10	F			OP Amps, A/D, D/A
No Lecture	Oct. 13	M			Holiday
	Oct. 14	T		Lab 3 Design Conference
L13	Oct. 15	W			FPGAs

Lecture	Date	Day	Handouts	Due	Lecture Topic
No Lecture	Oct. 17	F		Lab 3 Analog
				check-off due
				in lab by 5:00 p.m.
L14	Oct. 20	M	PS 5 solutions	PS 5	Project Kickoff
			Project		(video tape)
			Information
L15	Oct. 22	W			Handshaking and
					Transmission Line Demo
No Lecture	Oct. 24	F
No Lecture	Oct. 27	M		Lab 3 check-off	Video
				due in lab by 5:00 p.m.
				Formation of
				Project Teams
	Oct. 28	T		Lab 3 report
				due in lab by 5:00 p.m.
L16	Oct. 29	W	How to make	Project Abstracts	Quiz 2 Review
			Your Project		Video 2
			Work
Quiz	Oct. 30	Th	Closed Book		Walker 7:30 - 9:30 p.m.
No Lecture	Oct. 31	F
No Lecture	Nov. 3	M		Proposal Conferences
L17	Nov. 5	W		Proposal Conferences	Motors
				revised Lab 2
				report for CI-M
				due in lecture

			Due
	Nov. 6	Th	Proposal Conferences
	Nov. 10	M	Holiday
	Nov. 11	T	Holiday
	Nov. 12	W	Block Diagram Conferences
	Nov. 13	Th	Block Diagram Conferences
	Nov. 14	F	Block Diagram Conferences
	Nov. 17	M	Block Diagram Conferences
	Nov. 18	T	Last day to sign-up for 6 units of 6.905
	Nov. 19	W	DROP DATE - Last day to deliver ADD cards to Registrar
			Project Design Presentations
	Nov. 21	F	Project Design Presentations
	Nov. 24	M	Project Design Presentations
	Nov. 26	W	Project Design Presentations
	Nov. 27	Th	Thanksgiving Holiday
	Nov. 28	F	Holiday
	Dec. 1 - 5	M-F	Wire and Debug
	Dec. 8	M	Project Demonstrations
	Dec. 9	T	Video-taping the Project Demonstrations
	Dec. 10	W	Project Reports due by 5:00 PM