Massachusetts Institute of Technology
Department of Electrical Engineering and Computer Science
6.111 - Introductory Digital Systems Laboratory
SCHEDULE FALL 1998
| Lecture | Date | Day | Handouts | Due | Reading | Lecture Topic |
| 1 | Sept. 9 | W | Genl. Info | Fl. ch. 1,2 | Administration, | |
| Schedule | Boolean Algebra | |||||
| Lab Info | ||||||
| Computer Info | ||||||
| Logic Analyzer | ||||||
| PS 1 | ||||||
| Lab 1 | ||||||
| Safety Memo | ||||||
| Wire Vouchers | ||||||
| Kit Signout Info | ||||||
| Background Info | ||||||
| 2 | 11 | F | Kmap | Fl. ch. 2, 3 | Karnaugh Maps, | |
| Gates, Symbols | Fl. ch. 4 | Combinational Logic, | ||||
| and Buses | sec. 10.8 | Gates, | ||||
| TTL sec. 1 | Loading Rules, | |||||
| 3-3 through 3-9 | Delays and | |||||
| Static Hazards | ||||||
| 3 | 14 | M | Fl. ch. 5 | DFF, RAMS | ||
| 4 | 16 | W | PS 2 | PS 1 | PALASM | |
| PAL Program- | PAL Architecture | |||||
| ming, 16V8/20V8 | ||||||
| data sheet | ||||||
| 5 | 18 | F | Fl. sec. 6-12 | Shift Registers | ||
| through 6-24 | and Counters | |||||
| 6 | 21 | M | FSMD | Fl. sec. 6-1 | FSM Design Notation | |
| through 6-12 | and PALS | |||||
| Fl. sec. 7-9 | ||||||
| and 7-10 | ||||||
| 22 | T | Lab 1 | ||||
| 7 | 23 | W | PS 3, Lab 2 | PS 2 | VHDL (1) | |
| 8 | 25 | F | VHDL (2) | |||
| 9 | 28 | M | Lab 2 | Fl. sec. 6-22 | Clock Gating, Pulse | |
| Design | through 6-24 | Synchronization |
| Lecture | Date | Day | Handouts | Due | Reading | Lecture Topic |
| 10 | Sept. 30 | W | Report Guide | PS 3 | Quiz Rev., | |
| Des. Rules | ||||||
| Phase II Form, | Phase II, | |||||
| Technical Report | ||||||
| Checklist, | ||||||
| Writing Resources | ||||||
| Stylistic Problems | ||||||
| Oct. 2 | F | QUIZ I | ||||
| Walker (50-340) | ||||||
| 11 | 5 | M | PS 4 | Fl. sec. 8-8, | Rom-Register | |
| 8-11, and | ||||||
| ch. 9 | ||||||
| 12 | 7 | W | Lab 3 (w/ data | Lab 2 Checkoff | Microprogram- | |
| sheets AD558, | ming | |||||
| AD670 | ||||||
| 8 | R | Lab 2 Report | ||||
| 13 | 9 | F | PROM Guide | VHDL (3) | ||
| Add Date | ||||||
| 12 | M | HOLIDAY | COLUMBUS DAY | |||
| 14 | 13 | T | Virtual Monday | Lab 3 Design | VHDL (4) | |
| 15 | 14 | W | PS 5 | PS 4 | Project Kickoff | |
| Project Info | Partner Pairing | |||||
| (Attachments: | ||||||
| Project Abstract, | ||||||
| 6.905 form) | ||||||
| 15 | R | Lab 3 MCU | ||||
| Checkoff | ||||||
| 16 | 16 | F | MC6847 | Video Design | ||
| 17 | 19 | M | Low Power | |||
| Guest Lecturer: | ||||||
| Prof. Chandrakasan | ||||||
| 18 | 21 | W | Project Abstracts | Position Encoders, | ||
| Actuators, | ||||||
| Communications, | ||||||
| Synchronization | ||||||
| 19 | 23 | F | PS 5 | Op Amps | ||
| D/A and A/D |
| Lecture | Date | Day | Handouts | Due | Reading | Lecture Topic |
| 20 | 26 | M | Lab 3 Checkoff | ``Digital Design in | ||
| the Real World'' | ||||||
| Guest speaker: | ||||||
| John Carney | ||||||
| 21 | 28 | W | How to Make | Lab 3 Report | Quiz Review | |
| Your 6.111 | Project Hints | |||||
| Project Work! | ||||||
| 30 | F | QUIZ II | ||||
| Walker (50-340) |
-- No More Lectures or Recitations --
| Date | Day | Due | Notes |
| Nov. 2 | M | Proposal Conference | |
| 4 | W | Proposal Conference | |
| 6 | F | Proposal Conference | |
| 9 | M | Block Diagram Conference | |
| 11 | W | HOLIDAY - Veteran's Day | |
| 13 | F | Block Diagram Conference | |
| 16 | M | Block Diagram Conference | |
| 18 | W | Project Presentations (in 34-101) | Last Day to add 6.905 |
| 20 | F | Project Presentations (in 34-101) | |
| 23 | M | Project Presentations (in 34-101) | |
| 25 | W | Project Presentations (in 34-101) | |
| 26 | R | HOLIDAY - Thanksgiving | |
| 27 | F | HOLIDAY - Thanksgiving | |
| 30 | M | DEBUG | |
| Dec. 2 | W | DEBUG | |
| 4 | F | DEBUG | |
| 7 | M | DEBUG | |
| 9 | W | PROJECT DEMONSTRATIONS | |
| (Video Tape) | |||
| 10 | R | Reports Due by 5:00 P.M. |
