Lecture 1 - February 2, 2000
Massachusetts Institute of Technology
Department of Electrical Engineering and Computer Science
6.111 - Introductory Digital Systems Laboratory

HANDOUTS are distributed at the lectures. Extras of the handouts can be found in the filing cabinet located at the left rear of the 6.111 laboratory (38-600), or you can print them from the course web page, http://sunpal2.mit.edu/6.111/s2000/6111.html.

CONTENTS of this first day of class packet:

1. Lecture 1 Notes (part)
2. General Information
3. Due Dates
4. General Lab Information
5. Computer Information
6. Brief Introduction to the HP Logic Analyzer
7. A Beginner's Guide to WARP
8. Problem Set 1
9. Lab 1
10. Safety Memo
    Read this, sign it and return form as indicated before coming to get your kit.
11. Kit Sign-out Sheet
    Read the back and sign it before coming to get your kit. Kits will be available starting at 10:00 A.M. Thursday, February 3, 2000.
12. 6.111 Sign-up Sheet (``Background Information'')
    Fill this out NOW and turn it in at the end of this class.
    

Recitations began yesterday with a demo of the HP Logic Analyzer. Learn how to use the HP Logic Analyzer.

Classroom recitations will begin on Tuesday, February 8, 2000. Lists of section assignments will be posted by Friday, February 4, 2000 on the bulletin-board in the lab.

Email questions or problems to 6.111staff@mit.edu

Extract of Grading ...(see footnote for 6.004 option)

5 Problem Sets (10%) 2 Quizzes (20%) 3 Labs (35%) 1 Project (35%)
Incompletes: hard to get. TAs are not authorized to negotiate grades.
6 Extra Units (add 6.905 by DROP date) - More details later.

The GOAL of 6.111 is to transform students with or without digital design experience into engineers capable of designing complex digital systems and implementing them with existing integrated circuits.

Essential elements of our approach include the provision of knowledge, environment, challenges, and help.

Knowledge provided consists of theory, examples, design rules, guidelines, and instruction on equipment use.

The environment provided consists of lab space, oscilloscopes, logic analyzers, a way to build things, computers, design software.

A variety of challenges are provided. Start with structured assignments and structured solutions. Evolve in steps to unstructured assignments and unstructured solutions.

Challenges consist of quizzes, problem sets, lab exercises, and a project. We will show what can be done (or what has been done). You are likely to be in real trouble if you don't keep up with the schedule for the labs.

Lab 1

Find the lab and wire something.
Program and test a PAL.
Learn about oscilloscopes and logic analyzers.

Lab 2

Design and implement a (quite complicated)
Finite State Machine (FSM) in VHDL using a CPLD (Complex PLDs).

Lab 3

Design and implement a (quite complicated) microprogrammed system. Again you will use VHDL to program CPLDs (and PALs). This lab is a good prototype for the size and complexity of the final project. (6.004 option skips Lab 3.)

Labs 4 and 5

(6.004 option only) Design and implement a Beta using VHDL to program CPLDs.

The PROJECT is the UNstructured assignment requiring an UNstructured solution. You and the staff will negotiate a proposal, have proposal conferences, block diagram reviews, and detailed logic reviews.

We, the teaching staff, will provides HELP with debugging and testing. We will provide ENCOURAGEMENT and liberal PRAISE as successes evolve.

This term we have what we will call the 6.004 option. Students who have taken 6.004 in either of the past two terms (calendar 1999) MAY (but do not have to) choose this option. Details will unfold as the term progresses. Students choosing this option will have only one quiz (at the time of the second 6.111 quiz) and will do Labs 4 and 5 instead of Lab 3.

Lectures, labs, and problems on problem sets marked with ``option'' are required only for students who have choose the ``6.004 option.'' Items marked with can be skipped by those students. Items that are unmarked are to be done by all students.

Labs 4 and 5 are yet to be written, but they will basically consist of an implementation of the Beta you designed in 6.004 or a variation of that design. Eligible students should decide to choose the ``6.004 option'' (or not) soon, no later than Wednesday, February 9, 2000.