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Massachusetts Institute of Technology
Department of Electrical Engineering and Computer Science

6.111 - Introductory Digital Systems Laboratory

SCHEDULE SPRING 2002
This outline is dynamic. The only things about it that are unlikely to change much is that which has already happened and due dates, which are firm.

All lectures (not quizzes) have lecture notes in addition to the handouts listed below.





Lecture Date Day Handouts Due Lecture Topic
           
L1 Feb. 6 W First Day Packet includes: 6.111 Sign-up Overview,
      General Information Sheet Intro to VHDL
      Syllabus    
      Due Dates    
      General Lab Information    
      Computer Information    
      Intro to HP Logic Anal.    
      Beginner's Guide to WARP    
      PAL Programming    
      Problem Set 1    
      Lab 1    
      Safety Memo    
      Kit Signout Form    
      Background Information    
      and Schedule Form    

L2

Feb. 8 F Gates, Symbols, and Busses   Symbols, Kmaps,
      Kmap   TTL Innards
          Boolean Algebra

L3

Feb. 11 M     VHDL entities
          VHDL architectures
          Structural Ckt. Diag.
          Output Eqns in report
          VHDL statements
          Computer Demo
          VHDL simulation

L4

Feb. 13 W PS 1 Solutions, PS 2 PS 1 PALs (PLD)s
      CPLD Module   CPLDs
          Ring oscillators
          Latches, Edge Trig. FF
          D, T, SR, JK flip-flops

         





Lecture Date Day Handouts Due Lecture Topic
           

L5

Feb. 15 F VHDL and   MUXes, Counters,
      Negative True   Shift Reg., FSM Notation
          FSM Example
          VHDL and Negative True

L6

Feb. 19 T(M) ``Virtual Monday''   VHDL Statements
      No Recitation on   VHDL processes
      this physical Tuesday   Generic and Others
          VHDL counters
          Counter simulation
          Computer Demo

L7

Feb. 20 W PS 2 solutions, PS 3 Lab 1 Pulse Synchronization
        PS 2 Lab 2 Discussion, Demo
          Lab 2 Demo (TV Camera)

L8

Feb. 22 F Report Guide   Memories
      Phase II form   FSMs in VHDL
      Lab 2   Writing Phase II
      (6264 data sheets),    

L9

Feb. 25 M     Grid Example,
          Hierarchical design

Feb. 26 T   Lab 2 Design  

L10

Feb. 27 W PS 3 Solutions PS 3 VHDL identifiers,
          attributes,
          Tri-state,
          Q1 review

Q1

March 1 F QUIZ 1   QUIZ 1 (Walker 50-340)

L11

March 4 M PS 4   Implied adders, Packages

L12

March 6 W Prom Guide   Microprogramming,
          PROM Programming

L13

March 8 F   Lab 2 Check-off Trolley Car Example,
          ADD date

L14

March 11 M Lab 3 Lab 2 Lab 3, discussion,
        Report demo (TV Camera)

L15

March 13 W PS 5, PS 4 Op Amps, D/A, A/D
      PS 4 Solutions   Aliasing Demo

March 14 Th   rev. Lab 2 reports  
        for Phase II  

L16

March 15 F     VHDL Summary

L17

March 18 M   Lab 3 MCU Video I
        Check-off  

         





Lecture Date Day Handouts Due Lecture Topic
           

L18

March 20 W MC6847 Lab 3 Design Video II,
          transmission lines

L19

March 22 F PS 5 solutions PS 5 Project Kickoff
      Project Information   (video tape)

March 25-29     SPRING BREAK  

L20

April 1 M     VHDL wrap-up

L21

April 3 W   Project Abstracts Guest Lecturer
          Bob Glorioso
          Low Power and
          Interconnect

L22

April 5 F   Lab 3 Check-off Guest Lecturer
          John Carney

L23

April 8 M   Lab 3 Report  
        Proposal Conferences  

L24

April 10 W How to Make Your Proposal Conferences Motors
      Project Work   Quiz 2 Review

Q2

April 12 F QUIZ 2   QUIZ 2 (Walker 50-340)

         








      Due    
           
  April 17 W Proposal Conferences    

April 19 F Block Diagram Conferences    

April 22 M Block Diagram Conferences    

April 24 W Block Diagram Conferences    
      Last day to sign-up for 6 units of 6.905    

April 25 Th DROP DATE - Last day to deliver ADD cards to Registrar    

April 26 F Project Design Presentations    

April 29 M Project Design Presentations    

May 1 W Project Design Presentations    

May 3 F Project Design Presentations    

May 6 M Project Design Presentations    

May 7 - 13 Tu-M Wire and Debug    

May 14 - 15 Tu-W Project Demonstrations    

May 15 W Video-taping the Project Demonstrations    

May 16 Th Project Reports due by 5:00 PM    

         





 
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Francis Doughty
2002-04-01